Semiconductors with predictable, reliable electronic properties are necessary for mass production. The level of chemical purity needed is extremely high because the presence of impurities even in very small proportions can have large effects on the properties of the material. A high degree of crystalline perfection is also required, since faults in crystal structure (such as dislocation, twins and stacking faults) interfere with the semiconducting properties of the material. Crystalline faults are a major cause of defective semiconductor devices. The larger the crystal, the more difficult it is to achieve the necessary perfection. Current mass production processes use crystal ingots about 300 mm in diameter which are grown as cylinders and sliced into wafers.
Because of the required level of chemical purity and the perfection of the crystal structure which are needed to make semiconductor devices, special methods have been developed to produce the initial semiconductor material. A technique for achieving high purity includes growing the crystal using the Czochralski process. The Czochralski process is a method of crystal growth used to obtain single crystals of semiconductors (e.g., silicon, germanium and gallium arsenide), metals (e.g., palladium, platinum, silver, gold) and salts.
The most important application may be the growth of large cylindrical ingots or boules of single crystal silicon. High-purity, semiconductor-grade silicon (only a few parts per million of impurities) is melted down in a crucible, which is usually made of quartz. Dopant impurity atoms such as boron or phosphorus can be added to the molten intrinsic silicon in precise amounts in order to dope the silicon, thus changing it into n-type or p-type extrinsic silicon. This influences the electrical conductivity of the silicon. A seed crystal, mounted on a rod, is dipped into the molten silicon. The seed crystal's rod is pulled upwards and rotated at the same time. By precisely controlling the temperature gradients, rate of pulling and speed of rotation, it is possible to extract a large, single-crystal, cylindrical ingot from the melt. This process is normally performed in an inert atmosphere, such as argon, and in an inert chamber, such as quartz.
In semiconductor device fabrication, the various processing steps fall into four general categories: deposition, removal, patterning, and modification of electrical properties. Deposition is any process that grows, coats, or otherwise transfers a material onto the wafer. Available technologies consist of physical vapor deposition (PVD), chemical vapor deposition (CVD), electrochemical deposition (ECD), molecular beam epitaxy (MBE) and more recently, atomic layer deposition (ALD) among others.
Removal processes are any that remove material from the wafer either in bulk or selective form and consist primarily of etch processes, both wet etching and dry etching such as reactive ion etching (RIE). Chemical-mechanical polishing (CMP) is also a removal process used between levels.
Patterning covers the series of processes that shape or alter the existing shape of the deposited materials and is generally referred to as lithography. For example, in conventional lithography, the wafer is coated with a chemical, called a photoresist. The photoresist is exposed by a “stepper”, a machine that focuses, aligns, and moves the mask, exposing select portions of the wafer to short wavelength light. The unexposed regions are washed away by a developer solution. After etching or other processing, the remaining photoresist is removed.
Modification of electrical properties has historically consisted of doping transistor sources and drains originally by diffusion furnaces and later by ion implantation. These doping processes are followed by furnace anneal or, in advanced devices, by rapid thermal anneal (RTA) which serve to activate the implanted dopants. Modification of electrical properties now also extends to reduction of dielectric constant in low-k insulating materials via exposure to ultraviolet light in UV processing (UVP).
Today, patterning or structuring of individual layers is performed at the process step of the specific layer, e.g., when forming a solar cell. A solar or photovoltaic cell is a device that converts photons from the sun (solar light) into electricity using electrons. In general, a solar cell that includes the capacity to capture both solar and non solar sources of light (such as photons from incandescent bulbs) is termed a photovoltaic cell. Fundamentally, the device needs to fulfill only two functions: photogeneration of charge carriers (electrons and holes) in a light-absorbing material, and separation of the charge carriers to a conductive contact that will transmit the electricity. This conversion is called the photovoltaic effect.
Silicon solar cell efficiencies vary from 6% for amorphous silicon-based solar cells to about 40% with multiple-junction research lab cells. Solar cell energy conversion efficiencies for commercially available mc-Si cells are around 14-16%. However, the highest efficiency cells have not always been the most economical—for example a 30% effective multi junction cell based on “exotic” materials such as gallium arsenide or indium selenide and produced in low volume might well cost one hundred times as much as an 8% efficient amorphous silicon cell in mass production, while only delivering about four times the electrical power.
As already mentioned before, patterning or structuring of individual layers today is performed at the process step of the specific layer. For example, when manufacturing a solar cell, front contacting is performed only when the solar cell is complete. This, however, has the disadvantage of light shading that will lead to a loss of surface area and will thus generate a 5-8% loss in efficiency.